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• #8599 Janos250 őstag

  Új Válasz 2018-05-09 10:15:17 #8599

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  Janos250

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  Ha szóba került a memória chipek programozási módja, egy adalék hozzá:

  All the SPI Flash manufacturers call the following things by slightly different names. I'm going to use Gigadevice's command names in this post because they map well to the Espressif names. However your SPI Flash chip's datasheet may use different names. The command hex codes should be the same, though.

  Not all chips support all of these modes. The datasheet is the best source to know what supports what.

  DIO - SPI host uses the "Dual I/O Fast Read" command (BBh). Two SPI pins are used to write the flash address part of the command, and to read flash data out. Therefore these phases need half the clock cycles compared to standard SPI.
  DOUT - SPI host uses the "Dual Output Fast Read" command (3Bh). Two SPI pins are used to read flash data out. Slightly slower than DIO, because the address is written via the single MOSI data pin.
  QIO - SPI host uses the "Quad I/O Fast Read" command (EBh). Four SPI pins are used to write the flash address part of the command, and to read flash data out. Therefore these phases need a quarter the clock cycles compared to standard SPI.
  QOUT - SPI host uses the "Quad Output Fast Read" command (6Bh). Four SPI pins are used to read the flash data out. Slightly slower than QIO, because the address is written via the single MOSI data pin.

  In terms of performance: QIO > QOUT > DIO > DOUT. I'm fairly sure the flash cache issues 32 byte reads each time, so QOUT or QIO are substantially faster than DIO or DOUT.

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