Ez mar K5-tol fogva jelen van az AMD CPU-kban, csak eleinte kisebb meretu volt, ime:

K5:

''Transistors
4,300,000 (includes 34 KB L1 Cache)
...
Level 1
Code 16 KB, 4-Way, 32 Byte/Line, SI,
2x Fetch Port (supports Split-line Acess),
5 Pre-decode Bits/Byte(adds 10 KB),
Blocking, Dual Tags, RRR

Data 8 KB, 4-Way, 32 Byte/Line, MESI,
Dual-ported, Blocking, Dual Tags,
Write Allocate, 4 Banks, RRR''


K6:

''Transistors
8,800,000 (K6, includes 84 KB L1 Cache)
9,300,000 (K6-2, includes 84 KB L1 Cache)
21,300,000 (K6-III, includes 84 KB L1 and 256 KB L2 Cache)
??? (K6-2+, includes 84 KB L1 and 128 KB L2 Cache)
??? (K6-III+, includes 84 KB L1 and 256 KB L2 Cache)
...
Level 1
Code 32 KB, 2-Way, 32 Byte/Line, SI,
2x Fetch Port (supports Split-line Acess),
5 Pre-decode Bits/Byte(adds 20 KB), LRU

Data 32 KB, 2-Way, 32 Byte/Line, MESI,
Dual-ported, Write Allocate, LRA''

K7:

''Transistors
22,000,000 (includes 152 KB L1 Cache)
37,000,000 (TB: includes 152 KB L1 and 256 KB L2 Cache)
25,000,000 (SF: includes 152 KB L1 and 64 KB L2 Cache)
37,500,000 (PM: includes 152 KB L1 and 256 KB L2 Cache)
25,200,000 (MG: includes 152 KB L1 and 64 KB L2 Cache)
37,200,000 (TH: includes 152 KB L1 and 256 KB L2 Cache)
54,300,000 (BT: includes 152 KB L1 and 512 KB L2 Cache)
...
Level 1
Code 64 KB, 2-Way, 64 Byte/Line, SI, LRU,
3 Pre-decode Bits/Byte(adds 24 KB)

Data 64 KB, 2-Way, 64 Byte/Line, MOESI, LRU,
Dual-ported, Write-Allocate, Multi-banked''

:DD


hobizoli

több drón kell ;P