''IA-32 implementation
Intel P4 (incl. Celeron and Xeon)
General Details
Name:
Celeron (Low End)
Pentium 4 (Mid Range)
Pentium Xeon and Xeon MP (High End)
mobile Celeron and Pentium 4M (Mobile)
Codename:
Willamette (0.18 µm), Foster (Xeon), Foster MP (On-Die L3)
Northwood (0.13 µm), Prestonia (Xeon), Gallatin (On-Die L3)
Prescott (0.09 µm), Nocona (Xeon), Potomac (On-Die L3)
Family/Generation:
80786, 7th Generation, MMX, SSE, SSE2
Vendor: Intel
Manufacturer: Intel
...
Level 3 (selected parts):
Unified (0.18 µm)
512 KB, 4-Way, 64 Byte/Line, MESI,
1024 KB, 8-Way, 64 Byte/Line, MESI,
2 Lines/Sector,Inclusive, Pseudo-LRU,
Non-blocking, 64 GB cacheable,
14/14 Cycle Latency (Integer/FP)
Unified (0.13 µm) 1024 KB, 8-Way, 64 Byte/Line, MESI,
2048 KB, 8-Way, 64 Byte/Line, MESI,
2 Lines/Sector,Inclusive, Pseudo-LRU,
Non-blocking, 64 GB cacheable,
14/14 Cycle Latency (Integer/FP)''
:C
hobizoli
több drón kell ;P
